In recent years, metal oxide semiconductor (MOS) solid-state imaging devices have been mounted on mobile device cameras, vehicle-mounted cameras and surveillance cameras.
Since a high-resolution imaging capability is demanded of the solid-state imaging devices, these devices need to achieve a finer design and a greater number of pixels. In conventional solid-state imaging devices, increasingly finer pixels bring about the size reduction of photodiodes. Accordingly, the decrease in a saturation signal amount and the reduction of an aperture ratio cause a problem of decreasing sensitivity.
As a solid-state imaging device for solving this problem, a layered solid-state imaging device has been proposed. In the layered solid-state imaging device, a photoelectric conversion film is laid on an outermost surface of a semiconductor substrate. Light enters from above the layered films. The above-noted solid-state imaging device has a configuration in which an electric charge generated by photoelectric conversion in the photoelectric conversion film is read out using a charge coupled device (CCD) circuit or a complementary MOS (CMOS) circuit in the semiconductor substrate.
Patent Literature (PTL) 1 discloses a conventional layered solid-state imaging device.
FIG. 7 is a pixel circuit diagram illustrating the layered solid-state imaging device described in PTL 1. In a pixel circuit illustrated in FIG. 7, a charge storage region (FD) and a pixel electrode 515 are electrically connected, and a voltage of the charge storage region varies according to the intensity of incident light. Also, the charge storage region is electrically connected to a gate electrode of an amplification transistor 517b. Thus, this pixel circuit can amplify the voltage variation in the charge storage region and read it out to a signal line 517d via a selection transistor 517c. 
In the above-described layered solid-state imaging device, the photoelectric conversion film is laid over a wiring layer used for a read-out circuit and a signal processing circuit. The electric charge obtained in the photoelectric conversion layer is stored in the charge storage region provided in the semiconductor substrate. Thus, the electric charge obtained in the photoelectric conversion layer is transferred to the charge storage region via a contact plug.
PTL 2 discloses a structure of the contact plug.
FIG. 8 is a sectional view illustrating a pixel portion of a solid-state imaging device described in PTL 2. If the contact plug (connection hole) is formed of a metallic material, an alloy formation of the metallic material and silicon involves a crystal defect, which serves as a source of noise generation. Accordingly, to address the problem of the crystal defect, PTL 2 proposes a configuration in which a polysilicon contact is formed in an FD portion 602, thereby reducing a noise.